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MECA Electronics Attenuators

IC Package Outlines

Click on the image of the package family of interest for dimensioned drawings of common pin counts.

For detailed PCB layout drawings click here to go to the Semiconductor Vendor Links page on RF Cafe. See table of package information at bottom of page.












DIP
(Dual Inline Package) 		SOIC
(Small Outline Integrated Circuit)
DIP package drawing - RF Cafe SOIC package drawing - RF Cafe
PLCC
(Plastic Leaded Chip Carrier)		LCC
PLCC package drawing - RF CafeLCC package drawing - RF Cafe
TO
(Transistor Outline)		TSSOP
(Thin Shrink Small Outline Package)
TO package drawing - RF Cafe  TO package drawing - RF CafeTSSOP package drawing - RF Cafe
SOT
(Small Outline Transistor)		SSOP
(Shrink Small Outline Package)
SOT package drawing - RF Cafe 

Small Package Designations
DesignationPackage
DIPDual inline package
MSOPMicro SOP
PDIPPlastic DIP
QSOPQuarter SOP
SIPSingle inline package
SOIC (or SO)Small-outline IC
SOJJ-lead SOP
SOPSmall-outline package
SOTSmall-outline transistor
SSOPShrink SOP
TSOPThin SOP
TSSOPThin shrink SOP
TVSOPThin very fine SOP
Note: These designations are often followed by numbers that indicate the number of leads.

Small Package Dimensions
Package designation
and pin count		Nominal body size
(L3W3H) (mm)		Total footprint
(L3W) (mm)		Lead pitch
(mm)
DIP-810×6×55×7.52.54 (0.1 in.)
SO-85×4×1.755×61.27 (0.05 in.)
SSOP-83×5.3×23×80.65
TSSOP-83×4.4×1.23×6.40.65
MSOP-83×3×1.13×50.65
TVSOP-143.6×4.4×1.23×6.40.4
QSOP-164.9×3.9×1.74.9×60.635 (0.025 in.)
SOT23-53×1.6×13×30.95
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Kirt Blattenberger - RF Cafe Webmaster
Copyright: 1996 - 2024
Webmaster:
    Kirt Blattenberger,
    BSEE - KB3UON

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