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Sharon Moriarty 860 Sobrato Drive, Apt D Campbell, CA 95008 sharonlaura@sbcglobal.net Job Title: Analog/RF Board Design and Simulation Engineer Objective: To function as a leading industry expert in Analog/ RF board and antenna design. To employ my excellent design innovation skills, technical and analytical abilities to spearhead many new progressive and technologically exciting designs. To exploit my strong analog circuit design and extensive design simulation experience at the IC, board and system levels to provide novel, cost-effective and greatly simplified solutions to complex board and system level design problems. Employment: Mar 03 to Nov 06 Analog / RF Design Engineering Specialist 2WIRE, Grass Valley, California Design, Simulation and Test of numerous custom ISM band Antennas. Designs included Monopoles, Dipoles, PIFAs, Patch Antenna Arrays, Slotted Patch Antennas, Directional Antennas, Dual-Band Antennas and were optimized for low VSWR and high impedance matching bandwidths. Modeling and simulation was completed with CST, and was followed by VNA testing and matching. Built the Farfield radiation patterns from extensive measurements in an anechoic chamber. Designed and tested many embedded passive devices including ISM filters, directional couplers, frequency traps and programmable attenuators. Designer of RF interfaces for wireless application points that included the matching and evaluation of many RF Power amplifiers, LNAs, Baluns and Filters. Testing included S-Parameter, Return loss, Noise and EVM analyses. Designer of a wireless remote control for multimedia applications, and of home gateway products supporting DSL and of numerous test boards. Was instrumental in the specification and evaluation of all aspects of these designs including the power supplies, memory and ASIC interfaces, USB, DSL, Ethernet and POTS lines. Simulation of RF interfaces was completed using Genesys, APLAC and AWR software and included s-parameter, noise, transmission path loss, return loss, IMD and stability analyses. Fixes were identified to improve SNR and noise figure, and to improve on stability and power optimization. Simulation of PCB board and IC packages using SPEED2000 and PowerSI. Established timing margins and budgets, crosstalk levels and board and package supply and planar resonances. Established decoupling capacitor networks needs to eliminate resonances while establishing low impedance pathways for all power supplies. Employed HSPICE and IBIS modeling software for corner simulations on our memory and ASIC bus interfaces. Employed PowerDC to establish DC noise margins, current densities, board and package hotpoints and probable failure locations. Provided optimal BGA package signal assignments and stackup definitions of custom ASICs to provide excellent S.I. and power integrity. EMC testing for pre-certification of our products to meet FCC Part 68, and EN55022 radiation emission limits. Established numerous fixes to improve radiated noise margins and noise immunity particularly at critical/borderline frequencies. Other tasks included the development of DVT testplans and documentation, product cost reduction measures and many external and internal presentations. Oct 00 to May 02 Senior Design Engineer / Manager High Connection Density, Sunnyvale, California Manager, chief initiator and team builder of the design engineering group for this startup company. Stimulated the success and growth of this company by developing high performance multi-modular solutions targeted for the networking, server and gaming industries. Delivered well thought out, insightful, space-efficient and cost effective designs for the ASIC and memory industries. Created new product ideas and concepts and was responsible for all new product design, simulation and signal integrity. Developed numerous technical whitepapers, patents and presentations to help promote this company while simultaneously protecting its I.P. Sept 96 to Oct 00 Analog Design Engineer Lucent Technologies Inc., Milpitas, California Analog designer of analog line interface boards for voice messaging applications. Experienced at designing custom and high performance analog circuits to meet and exceed domestic, international and agency requirements. Key developer of all network interface circuitry on an advanced voice messaging platform. Architect and designer of networking solutions to support T1/E1, ATM, Ethernet, SCSI and sensoring applications. Modeled and simulated analog line interface circuits, and high speed backplanes with transmission line, I/O, driver and stub models. Performed system level characterization, modifications and testing. Responsible for establishing design feasibility, reliability, cost and all for generating all technical specifications and product release documentation. Sept 95 to June 96 College Lecturer Cork Regional Technical University, Cork, Ireland Lectured in modern software CAD applications and in engineering design in the Electrical Engineering department of this modern University. Cultivated a self-initiating, lateral and creativity-centered engineering approach among undergraduates engineers. Pioneered the use of Viewlogic and FPGA based digital design tools for the University. Established and promoted workshops and classes on simulating and optimising designs. Sept. 94 to Aug. 95 Software Developer / Technical Support Engineer Irish National Electronic Trading Agency, Dublin, Ireland. Strategic software developer and product support engineer that stimulated and improved customer confidence with both the network offerings and Electronic Data Interchange (EDI) services of this young company. Implemented and delivered prompt software and technical solutions for customers using our mobile communication products. Developer of software applications in C, C++, Pascal and Foxpro to enhance and build our service feature capability and portfolio Aug. 90 to Dec. 92 Research Engineer INMRC, University College Cork, Ireland. Designer, Developer and Tester of novel continuous-time Delta-Sigma Analog-to-Digital converters (ADC ICs'). Employed advanced DSP techniques and noise shaping methodologies to boost design performance. Design verification made use of intensive circuit based simulations and behavioral modeling. Developed layouts for both full and semi-custom ADC converter designs, high performance amplifiers, comparators, extremely linear current sources and references on a CMOS technology. Built custom testing solutions by prototyping hardware test beds to provide the accurate reference voltages, biasing currents and stable clock sources, key to high resolution testing of the ADCs'. IC testing was further enabled by employing an LV500 digital test system. Demonstrated to undergraduates in Electronics, during this time on some practical of the practical design considerations involved in the design of amplifier, oscillator, active filter, triggering, and BJT circuits. EDUCATION: MSEE, Irish National Microelectronics Research Center, Ireland, 1993 Thesis: Design, Simulation and Test of continuous-Time Delta-Sigma ADCs' BSEE (Honors): National University of Ireland, 1990 Design Tools: CST, HFSS, Genesys, SPEED2000, PowerSI, PowerDC, AWR, PSpice, HSpice, ADICE (Analog Devices Proprietary Spice), Allegro Expert, Spectra, VHDL, ICX, Orcad, Viewlogic, Agile, Perforce, Powerview, Motive, Constraints Manager, MathCad, TurboCad, Dracula. Hardware: Advantest R3768 and HP8714 Multiport VNAs, Spectrum Analyzers, Gigatest, TDR, Oscilloscopes (Tek TDS7404 and LeCroy), Power Supplies, Logic Analyzers (TLA715), Surge Generators, FireBird, Hybrid Testers, SAGE, Return Loss,, Anechoic Chamber Testing. Software Skills: C++, C, PASCAL, Fortran, Assembly x86, Basic, FoxPro, Unix Shell Scripts, LAN, WAN, TCP/IP, OSI, Webdesign Certifications: ! Numerous Engineering Certifications including : - PCB Layout System for Allegro Expert 14.0, Advanced VHDL, SPEED 2000, Voice Over IP (VoIP), Custom WAN Course, EMC Printed Circuit Board Design, and High Frequency Design. Advanced Training for IC packaging Applications. General Skills: ! Excellent at innovating new products and directing engineering approaches. ! Responsive and very competent in completing projects with tight timelines. ! Very good human relation skills and an excellent communicator of ideas ! Holder of numerous Engineering Patents. ! Experienced at providing tailored and novel engineering solutions in high frequency and space-constrained applications. |