New AWR Application Note Describes Benefits of Circuit Envelope Simulation
for 3G and 4G Amplifier Design
June 14, 2012 Press Release
El Segundo, CA – June 14, 2012
What: Current and emerging wireless systems place greater demands on
RF power amplifiers, including exceptional linearity, efficiency, and bandwidth. This new application note from
AWR entitled “Leverage Circuit Envelope Simulation to Improve
PA Performance” describes circuit envelope simulation, now part of
AWR 2011. This technique lets designers optimize
performance between linearity, efficiency, and bandwidth from the device to the system level. It builds on SPICE
time domain and harmonic balance frequency domain simulation to provide more than either one alone can achieve.
The full story continues on line:
http://web.awrcorp.com/content/Downloads/AWR-VSS-Envelope-White-Paper.pdf and as a PDF attached to this
AWR, the innovation leader in high-frequency EDA software, dramatically reduces development time and cost for
products employed in wireless, high-speed wired, broadband, aerospace and defense, and electro-optical
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© Copyright 2012 AWR Corporation. All rights reserved. AWR is a National Instruments
Company. AWR, the AWR logo, AXIEM and Analog Office are registered trademarks and Microwave Office, Visual System
Simulator and iMatch are trademarks of AWR Corporation. Other product and company names listed are trademarks or
trade names of their respective companies.
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