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dipak Post subject: substrate terminal Posted: Mon Dec 18, 2006 8:10 am
Captain
Joined: Tue Nov 14, 2006 7:21 pm Posts: 9 Location: Nagpur(M.S) what should be the effects if we dont connect substrate terminal to the ground in CMOS process?
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fred47 Post subject: SubstratePosted: Mon Dec 18, 2006 12:33 pm
General
Joined: Wed Feb 22, 2006 3:51 pm Posts: 104 Hi Dipak!
Not connecting the substrate to ground in a CMOS process would have differing results, depending on what it is connected to:
1. Nothing. A floating substrate will cause roughly one-half of the mosfets to operate improperly. Which half would depend on whether your process was N-well or P-well. (As an aside: when I covered for a professor during a sabbatical, I was able to watch the students try to find out why their labs weren't working - a lot of very strange effects showed up due to an open substrate connection.
2. Negative voltage (for a normally-powered chip): Unless Vdd(max) is exceeded, you'll only encounter problems if the substrate is inadequately bypassed.
3. Positive voltage: depending on the voltage, as you increase from 0 volts, you'll increasingly move away from proper operation until your design doesn't work.
Good Luck! Fred
Posted 11/12/2012 |