need help to coaxial balun simulation - RF Cafe Forums

 Post subject: need help to coaxial balun simulation

Posted: Sat Jun 27, 2009 1:39 am 

I have simulated a coaxial balun which will transform 50ohm unbalanced impedance to 25ohm balanced impedance as the following circuit:

The following picture is the simulation result, I get 100ohm impedance of port2 and port3.

How can I get the correct result?

 Post subject: Re: need help to coaxial balun simulation

Posted: Wed Jul 01, 2009 11:05 am 

:

Hi,

The circuit you show is not correct. It shows a 50ohm un-balanced input with two 50ohm un-balanced outputs.

Sometimes thinking in DC helps. A 50ohm source wants to see a 50ohm load. In this case, it is 2 50ohm resistors in parallel, which is 25ohms. (not 50)

You single ended outputs need to be 100ohms. 100ohms in parallel = 50ohms = good!

or

Put a 50ohms between port 2 and 3, this is balanced.

Balanced 50ohm resistors, Instead of doubling the resistor value you are doubling the voltage, because it's 180 out of phase. So it = 50ohms = good!

or

use a 2:1 transformer at the input to convert 50 to 25 ohms before the circuit. This is typical practice for power splitters.

I don't know your application so I'm not sure how you want to proceed.

Good luck.

Rod

 Post subject: Re: need help to coaxial balun simulation

Posted: Sat Jul 04, 2009 1:14 am 

Thank you!

I am designing a 200W, IMD3< -40dBc amplifier for 30-88MHz application. I am going to using MRF6VP2600HR6(freescale) which is designed for push-pull operation.

I want to have a simulation result of the test circuit. Then I find problems with this simple balanced impedance simulation.

How can I simulate a balun and get a right balanced impedance in ADS?

 Post subject: Re: need help to coaxial balun simulation

Posted: Sat Jul 04, 2009 12:03 pm 

Hi,

I think the Freescale datasheet should give some direction. Have you a considered using a balanced amplifier, since IM3 seems to be most critical?

Maybe IR or nubbage could help out, there brains are bigger than mine.

Rod

 Post subject: Re: need help to coaxial balun simulation

Posted: Mon Jul 06, 2009 3:26 am 

Thanks for the plug, Rod, but I have no experience of ADS and never designed a solid state amplifier.

But IR is definitely a guru in this area, and we do have a few others too.

_________________

At bottom, life is all about

Sucking in and blowing out.

 Post subject: Re: need help to coaxial balun simulation

Posted: Mon Jul 06, 2009 3:35 pm 

Hello,

The preferred topology in this case is Balanced Amplifier and mainly for the reason that the isolation you would achieve with Push-Pull is very low (6dB in theory, and I am afraid that in reality not much better). The device which you are using has a very high gain and using Push-Pull configuration can lead to instability problems and with such a high amount of output power this can lead to a nightmare!!

I am not sure if it is possible to use this specific device in Balanced Amplifier topology because of impedance matching issues. The device's impedances mentioned are balanced from Gate to Gate and from Drain to Drain and are 4 times higher compared to single- ended device for the same output power. The impedances given are already small due to the high output power capability. I think that it is wise to find another device with higher output impedance if possible.

The impedances mentioned are not in your BW of operation, you can either ask the manufaturer for this data or use the device's model provided - the model should also cover your BW of operation.

The 200W output power you mentioned, is it your average power or peak power?

_________________

Best regards,

- IR

 Post subject: Re: need help to coaxial balun simulation

Posted: Wed Jul 08, 2009 4:32 am 

Thank you for your suggestion! 200W output power is my average power.

I am really new to amp design, and I think I have to change my plan.right now I have the following questions:

1."If the differential RF excitation is available,the impedence presented by the push-pull pair at both input and output is a factor of 2 higher than that which would be presented by one single-ended device."This is what I have read in the test book,why did you say it is 4 times?

2.For MRF6VP2600 is not suitable, I am thinking about MRF6V2300N(freescale), is it suitable for a balanced amp topology?

 Post subject: Re: Balanced Amplifier topology

Posted: Wed Jul 08, 2009 2:36 pm 

1. I got this information from an application note. I would rely more on your text book, also intuitively 2 times higher for Push-Pull makes more sense.

2. The transistor which you choose is good for Balanced Amplifier topology. In the data sheet, the impedances are also mentioned for your BW - at 27MHz.

If you need more help, let us know!

_________________

Best regards,

- IR

 Post subject: Re: need help to coaxial balun simulation

Posted: Sun Jul 12, 2009 11:37 pm 

Hi,IR,I got three more questions:

1. It is not easy to find a 30-88MHz hybrid coupler with average power more than 200W, the only one met the conditions is innovative's product, but it has a 0.9dB of amplitude imbalance and 5 degree of phase imbalance. Is this one suitable for my design?

2. I have seen Ina's question about the relationship of IMD3 vs tone spacing. My amp will be test under 1.5MHz tone spacing. In your opinion, can I get IMD3 as good as the figure 8 of datasheet when tone spacing changes from 100kHz to 1.5MHz?And please give me some advise on how to avoid Ina's problem.

3. Which bias should I choose to get my IMD3<-40dBc? 1125mA or 1350mA?

 Post subject: Re: need help to coaxial balun simulation

Posted: Mon Jul 13, 2009 8:41 am 

1. Indeed, such a hybrid coupler is not easy to find. What you could do in order to compensate for the phase and amplitude imbalance it to measure the hybrid coupler beforehand and to compensate on the imbalance on each channel by tuning the lumped components values.

2. It is hard to answer on this question. The best way to get an insight on the operation of the circuit under various tone spacings is by simulation. If you have ADS available, you can inject 2 signals with different spacing and see how it works. The only variable which you can control is the bias - In case the IMD3 is getting worse you can adjust the bias to improve it. If this does not work - you should consider a use of linearization scheme.

3. Definitely Idq=1350mA would cause lower distortions. You can see that by the flat gain along the entire range of the output power. Any curved shape of output power (Like seen for the lower bias levels) is simply a distortion.

_________________

Best regards,

- IR

 Post subject: Re: need help to coaxial balun simulation

Posted: Wed Jul 15, 2009 9:34 am 

Hi,IR!I have new problems with with choosing Zsource.I could choose Zload with the loadpull simulation in ADS,but when I do the sourcepull simulation, there seems to be many points having nearly the same power and eff,how do you usually choose Zsource?

 Post subject: Re: Zsource

Posted: Wed Jul 15, 2009 1:57 pm 

Zsource is not critical in PA design. It is critical for LNA design, for which you do Source Pull.

Therefore if the impedance points which you get provide similar output power and efficiency, you can choose the point which is easier to match, i.e. with the higher impedacne. Pay more attention to the load rather than to the source.

_________________

Best regards,

- IR

 Post subject: Re: need help to coaxial balun simulation

Posted: Thu Nov 19, 2009 4:34 am 

Hello,IR!I have a new problem right now.

Since we have already requested samples of MRF6VP2600,I went on with my project using this transistor with the pushpull operation.To avoid the stability problem,we change the freqency range to 57-63MHz.

I finished the circuit building, found a stable bias at Id=2.3A,Gain=24dB(f=60MHz) and measured the VSWR with network analyzer(Pin=-20dBm),vswr1=1.4,vswr2=7.2 @ f=60MHz.

Then I began to increase the input power(f=60MHz),I increased Pin 2dBm everytime.Gain remained 24dB until Pout=37dBm,it droped to 4dB and couldn't recover.

I have taken the transistor down,it seems to be secondary breakdown.

Could you tell me why the transistor breakdown and what shall I do next?

The schematic circuit is as follows:

The amp picture is as follows:

 Post subject: Re: need help to coaxial balun simulation

Posted: Fri Nov 20, 2009 2:57 pm 

Hello,

There can be several causes:

1.It could be that the device was already internally damaged.

2. From your description it looks like the output VSWR was already bad in low power and probably became worse when you increased the unput power. According to the data sheet the transistor can withstand a VSWR of 10:1 (Γ=9/11).

3. What measures did you use to evacuate the heat from the transistor (e.g. Heat-sink with fins and fan)?

_________________

Best regards,

- IR

 Post subject: Re: need help to coaxial balun simulation

Posted: Sat Nov 21, 2009 3:22 am 

Thank you!

I use a heatsink with fins(250*200*80mm) to evacuate the heat,but I didn't add a fan.I think I will add a fan to the heatsink in my next test.

I have another question which has confused me for a long time:

The output vswr is turely bad,but it seems when you apply a power match instead of a conjugate match to the output of the transistor,you will get a high output and bad vswr.(e.g. a lot of polyfet transistors)If this transistor can handle a vswr of 10:1 (Γ=9/11) when output power is 600W,how could the output power get through when the reflect coefficient is such a large number?

 Post subject: Re: need help to coaxial balun simulation

Posted: Sun Nov 29, 2009 4:36 pm 

Conjugate match by principle is narrow-band almost as a resonant frequency compared to power match you described which is broad-band.

The VSWR handling of the device (10:1) means that the device is able to handle most of the reflected power from the load without being damaged. The power transmitted to the load will of course be small under these conditions (Pt=Pi-Pr).

VSWR of 10:1 means that the return loss is around

-1.75dB. that means that almost the entire power is being reflected back to the transistor and a small portion is being transmitted to the load.

_________________

Best regards,

- IR

 Post subject: Re: need help to coaxial balun simulation

Posted: Sun Jul 04, 2010 11:44 pm 

Hello，everyone! I get a new problem. I have built a balanced amplifer for 57.4-63.6MHz application using the LDMOS MRF6V4300 of freescale.

Last week I done the first test, I used the Spectrum analyzer to measure the output with sereval attenuators (totally 57dBm) after the amp, when output power increase to about 100W, the reading of the Spectrum analyzer become instable, it was changing between -6.6dBm and -6.4dBm, which meant output power was changing between 50.4dBm and 50.6dBm.

The efficiency at this output is about 26%, I want to kown that, was the reading changing a serious problem or not? If it was, what should I do to solve this problem?

 Post subject: Re: need help to coaxial balun simulation

Posted: Mon Jul 05, 2010 3:02 am 

You shoule never use spectrum Analyzer to measure the output power. Spectrum analyzer output reading is not accurate as power meter and can have up to +/-0.5dB tolerance.

Therefore, use power meter and measure exactly the attenuation of the attenuators and cables, adapters etc which you place between the PA output to the power meter.

_________________

Best regards,

- IR

 Post subject: Re: need help to coaxial balun simulation

Posted: Thu Jul 22, 2010 4:00 am 

Hello!I get a big problem in improveing the eff of the amp.

I've made my amp output 150W, the effs versus outputs are as follows:

Pout(dBm) eff(actual) eff(simulation)

44.5 13.9% 13.9%

45.5 15.9% 16.3%

46.6 18.5% 18.9%

47.6 20.9% 21.8%

48.7 23.3% 25%

49.6 26.3% 28.2%

50.6 29.6% 31.6%

51.6 33.1% 35.7%

The transistor I used was MRF6V4300 of freescale, the circuit was built in balance configuration.

The load impedence is: Rload=3.6+j*0.4 (f=60MHz),I got this impedence by ADS simulation.

And I have measured the impedence of the output match network at harmonic frequencies:

Rload=3.6+j*0.4 f=60MHz

Rload=1+j*3.3 f=120MHz

Rload=0.3+j*6.1 f=180MHz

Rload=0.2+j*15.5 f=240MHz

Since the difference between eff(actual) and eff(simulation) became larger when the Pout increased, I thought there might be something wrong with my circuit.

Right now I am short of large capasitors, so I have used small capacitors in parallel(56pF*4) to subsitute for large capacitor in my output match network.Was this a big problem?

This is also another problem in the two tone signals measurement for IMD3 test, the IMD3 signals became unstable when the Pout increased to 100W, it kept jumping from -43dBc to -50dBc.

Last time the output unstable was because of the high temperature, I sliped off some silica gel and it got normal, what's the reason for this IMD3 jumping?

 Post subject: Re: need help to coaxial balun simulation

Posted: Thu Jul 22, 2010 9:44 am 

Hello,

Actually, I do not think that you have a problem with the efficiency, because according to the data sheet it is stated that the efficiency for 300W is 60%, you are working in half of this power, therefore, the efficiency which you get is OK.

Take into consideration, that you work in Balanced configuration and you have some losses on the output coupler and transmission lines between the output coupler and the transistors' outputs.

Excessive heat can be a cause for this problem. Slipping some silica under the transistor is not an adequate solution. You should be very careful by implementing a solution for heat evacuation:

a. Under the transistor you have to apply very thin thin layer of silica, in such way that you are able to see clearly the transistor metal via the silica.

b. The heat sink has to be cooled by using 2 fans; i.e. one fan takes cool air towards the heat-sink and the other fan which rotates in the opposite direction evacuates the hot ait from the heat-sink towards out.

Read the following application note for more information:

https://sound.westhost.com/heatsinks.htm

In addition, try to see if the supply lines are clear from noise, and if there is no RF signal coupled back to the supply lines.

_________________

Best regards,

- IR

 Post subject: Re: need help to coaxial balun simulation

Posted: Thu Nov 04, 2010 12:15 am 

Hello! I find out a problem when building the balance amp (200W, 57.4-63.6MHz, using LDMOS MRF4300 of Freescale). The output section of the balance amp is shown in fig. 1.

The hybrid has been well tuned with the amplitude unbalance less than 0.1dB and the phase unbalance less than 1°.I use the L-C topology for the output match network. My problem is as follows:

When I built the output match network with the same capacitors and nearly the same wire-wound inductors, I got ZL1= 3.6-j*0.1 which is the right Zload from load-pull simulation by ADS, but meanwhile I got ZL2=3.2-j*0.2.

When I tuned the wire-wound inductors to get ZL1 and ZL2 closer, the amplitude unbalance and the phase unbalance became larger. Finally, when I got ZL2=3.5-j*0.2, The s-parameters of the whole section change to S21=-9.8, S31=-9.0, phase(S21)=-87, phase(31)=-170. The amplitude unbalance is 0.8dB and the phase unbalance is 7°.

The same problem also happens in the input section which is shown in Fig.2, the situation is even worse. If I want to make Zs1 and Zs2 closer, the amplitude unbalance and the phase unbalance of the whole section became as large as 2dB and 14°

What should I do, to make sure two impedances closer or make the amplitude unbalance and the phase unbalance of the whole section as small as possible?

The eff of the PA is still poor (37% at 200W output, the simulation result is 42% at the same output). In my former experiments, I tuned two impedances closer to make sure the gain of two amp is closer, So I think much power may be consumed on R2 due to the large unbalance.

Another question:

How many watts will be consume on R2 if the output power is 200W from your estimation?