Microwave Osc - RF Cafe Forums
Post subject: microwave osc
Unread postPosted: Wed
May 11, 2005 3:55 pm
i need the schematics for microwave
osc with a transistor
2000 - 3000 Ghz aprox
if somebody can
helpme please send a mail for me
Unread postPosted: Tue Apr 26, 2005 5:28 pm
What are exactly
your problems with bias and feedback? Let us know so we might be
able to help you out.
Unread postPosted: Tue Apr 26, 2005 9:22 pm
Joined: Sat Apr 23, 2005 2:09 pm
Location: Tampa, FL
One thing that I am curious about pertains
to having two types of feedback schemes in the circuit. In reality,
would this kind of design be appropriate? Currently, in my design,
I have a resistor feedback from collector to base and also a reactive
component attached to the emitter.
Aside from using an active
feedback scheme, it seems like that was the only option I had to
get my circuit stable at a certain range while getting a gain that
meets my spec. Is there a resource that can give me some sort of
analytical view of the feedback system? I kinda like seeing equations
that I can follow around, so it makes more sense to me.
somewhat, understand the resistive feedback part using DC analysis,
but as for the reactive element on my emitter, I'm a bit clueless
with a numerical analysis on how it stabilizes my circuit.
For the bias part, I always thought the Q point would ideally
be the mid-point of the supply voltage to allow maximum signal swing,
but it seems like for the bias networks I've seen in my book, they
don't seem to care about this. They are more interested in maintaining
the collector current as temperature varies. Is this always the
case for LNAs in microwave frequencies?
I'm sorry if my questions
seem off. I'm a bit new to this stuff.
Wed Apr 27, 2005 12:14 am
Your questions seem
a bit naitve, yet they are OK.
The bias point should ideally
be in the middle of the Ic vs. Vce curve. Yet, you should check
if the maximal outpt swing of the LNA per this given operating bias
point still gives you a complete swing without clipping. Then if
this is the case, then you can work at this bias point (that still
will allow a Class A linear operation).
A feedback resistor
is a common way to provide a broadband stability. This method is
called uniliteralization, since it reduces the effect of the reactive
feedback element (the CB junction capacitance, which is a cause
for oscillation), making the transistor more unilateral (reducing
S12). This method reduces the gain of course, yet doesn't hurt the
NF or IP3 as placing a series resitor at the output or at the input
of the device.
Attached below is a link to a tutorial that
discusses bias schemes (Both active and passive) specific for LNA
http://www.odyseus.nildram.co.uk/RFMicr ... rcuits.pdf
Hope this helps.
Should you need any other help,
please let me know.
Unread postPosted: Wed Apr 27, 2005 10:18 am
One very important thing people have tendency to forget
is that when you will adjust the amplifier on the bench you have
to stay very quiet.
Remember any source of noise will add
up the end result noise figure....
Post subject: LNA Design
Unread postPosted: Tue May 10, 2005
What are the design specs, device and frequency
range you require? Techniques vary. Above a few hundred MHz you
should use "S" parameters. Your design should start at the input
and you must provide the match necessary to get the noise figure
you desire. With this known you can claculate the load required
to get the desired gain and be stable. Using "S" parameters takes
all this into account. By the way an amplifier is never matched.
Generally you take a 50 source and add a matching network to present
a desired driving impedance to the amp. On the output you take a
50 ohm load and a matching network to present to the amplifier the
load necessary to get the desired gain and stablility. This is not
matching in the sense of a conjugate match. It is simply a network
that provides a desired impedance when attached to 50 ohms. I have
a nice little "S" parameter design application on my web page if
you need it. It requires that you know something about design so
you may want to look at the book by G. Gonzalez, "Microwave Transistor
My web page is at http://members.cox.net/thse-3.14159/download.htm
Tue May 10, 2005 11:34 am
I think that for LNA the bias
point is lower than 50% IDSS.
The best rule for this is to
follow the manufacturers recomendations....
Post subject: LNA
Unread postPosted: Thu May
12, 2005 12:09 am
The bias point for an LNA is driven by
the noise performance you require. Look at the device datasheet
and the manufacturer will tell you what current and voltage is required
for lowest noise. They will also give you noise parameters for thes
conditions. In general less current means lower noise. More current
means more noise but more device gain. Front signal handling and
intermod are usually important. A good design has to trade off low
noise performance against high level signal handling by finding
a compromise in bias point that works for most expected conditions.