Because of the high maintenance needed to monitor and filter spammers from the RF Cafe Forums, I decided that it would
be best to just archive the pages to make all the good information posted in the past available for review. It is unfortunate
that the scumbags of the world ruin an otherwise useful venue for people wanting to exchanged useful ideas and views.
It seems that the more formal social media like Facebook pretty much dominate this kind of venue anymore anyway, so if
you would like to post something on RF Cafe's
page, please do.
Below are all of the forum threads, including all
the responses to the original posts.
Post subject: Switching Negative Supply line using Positive
control Posted: Mon Aug 27, 2007 4:52 pm
Joined: Fri Jan 26, 2007 2:40 am
OK, I've got this
problem where I have to turn be able to control power to sections of
my board during TX or RX mode. For example lets say I've got a +5V supply
that runs to some Op Amps. Some are used in TX mode and some are used
in RX mode but that they aren't on all at the same time. We've used
a control line (coming from a PIC, 0 to 3 V) to drive a NMOS Fet which
in turn drives current thru a gate resistor of a PMOS device to either
open or short the PMOS to connect the +5V line to the Op Amps. We repeat
this circuit for TX and RX.
That works fine for a +5V but what
about the -5V? The first problem is the control line, which is too high
a voltage to switch a Fet. I obviously have to level shift but I can't
seem to get any fet to drive completely ON since I also have the problem
in that I don't have access to a voltage lower than -5V.
tried to run a search on the net for this but I keep coming up with
"Switching power supplies" or some such. Any idea what this kind of
problem is called? That might help my search.
Post subject: Posted: Tue
Sep 11, 2007 5:14 pm
Joined: Fri Feb 02,
2007 5:22 pm
Location: Overland Park, KS
3V uC drives gate of open collector inverter or buffer.
drives gate of PMOS. Drain of PMOS is at 5V. Gate of PMOS pulled to
drain via 1k.
Source of PMOS tied to gate of NMOS. Source of
NMOS tied to -5V. Gate of NMOS pulled down to source via 1k. Drain of
NMOS drives load.
I have used this configuration to gate-switch
large GaAs FETs and it works well.