Peak Power Detector Circuit - RF Cafe Forums
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Post subject: Peak Power Detector Circuit Posted: Sun May 14, 2006 10:44 pm
Joined: Mon Apr 10, 2006 12:43 pm
Good day. I am looking for information on peak power detectors.
It is my understanding that what makes a peak detector work is more of a timing issue then anything else. For example the burst of RF energy that needs to be measured is about 5 mS in length with a 100 mS off time between bursts. Now the detector does not have a long time constant (the response time of the diode is on the order of 100 nS). So the ADC needs a trigger to begin conversion when there is an RF signal present.
Is this the basic premise of a peak power detector? Any additional information would be appreciated.
Post subject: Peak power detectorPosted: Tue May 16, 2006 6:38 pm
Joined: Wed Feb 22, 2006 3:51 pm
There are some assumptions in your posting that I'd like to clarify.
1. The output of the peak detector must be a digital word, with enough bits (whatever that is).
2. The signal you're working with is a pulse, or pulse-like.
3. The timing of the presentation of the ADC output bits isn't particularly important (in other words, the signal's amplitude is slowly varying, if it changes at all).
4. You're interested in pulse-to-pulse variation (perhaps?)
Peak power detectors are often implemented in analog circuitry, where time constants, pulse widths, pulse repetition rates, etc have a distinct bearing on circuit designs.
Post subject: Peak power detectorPosted: Thu May 18, 2006 10:27 am
Joined: Mon Apr 10, 2006 12:43 pm
Good day Fred. Thank you for your response.
For right now, I am looking for some general information about how to design a peak power detector.
Let me restate my position to help clarify what I am talking about.
I will have an RF signal that is pulsed. I need to be able to measure the power for each pulse. I have made a couple of assumptions that might be my problems
1) The response time of the detector is fast enough (for example 5 uS) and the pulse width is sufficient large (5 mS) so that there is no problem with the detector responding to the signal.
2) The output of the peak detector needs to go to an embedded processor so I need an analog-to-digital convertor.
3) The ADC I am using is fast enough (conversion time of 5 to 10 uS) that I do not need to worry about a sample & hold circuit>
Based on these assumptions, it is my understanding that I would need to somehow trigger the ADC at the correct time to get an accurate power reading.
Are my assumptions valid?
Fred - if you have some additonal information about designing peak detectors (websites, books, magazines, etc) I would very much appreciate any information you can provide.
Thank you for your time and help.
Post subject: Posted: Sat May 20, 2006 4:37 am
Joined: Sun May 14, 2006 8:53 pm
Take a look at Analog Devices' website (RMS detectors and log-amps). The following linkcontains very good documentation.