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PLL loop filter design - RF Cafe Forums

Because of the high maintenance needed to monitor and filter spammers from the RF Cafe Forums, I decided that it would be best to just archive the pages to make all the good information posted in the past available for review. It is unfortunate that the scumbags of the world ruin an otherwise useful venue for people wanting to exchanged useful ideas and views. It seems that the more formal social media like Facebook pretty much dominate this kind of venue anymore anyway, so if you would like to post something on RF Cafe's Facebook page, please do.

Below are all of the forum threads, including all the responses to the original posts.


veerasamy
Post subject: PLL loop filter design Posted: Fri Oct 09, 2009 2:00 am

Captain

Joined: Wed Oct 07, 2009 6:27 am
Posts: 6
Please help on how to design PLL loop filter for specific loop band width? ( what is loop bandwidth anyway?). I have charge pump current and VCO sensitivity as input.

Thanks &Regards,
V.Veerasamy


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Alberto
Post subject: Re: PLL loop filter designPosted: Fri Oct 09, 2009 5:35 pm

Captain

Joined: Sun Oct 04, 2009 5:17 pm
Posts: 6
Hi Veerasamy,
if you are new with synthesizers, I strongly suggest you to read the book written by Dean Banerjee "PLL Performance, Simulation and Design": it's a really good reference. You can find it at the link
http://www.national.com/analog/timing/pll_designbook

If you are an Analog Devices' customer you can ask them a free copy of ADISimPLL that allows you to design and simulate synthesizers based on Analog Devices PLL.

Regards,
Alberto


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veerasamy
Post subject: Re: PLL loop filter designPosted: Sun Oct 11, 2009 11:46 pm

Captain

Joined: Wed Oct 07, 2009 6:27 am
Posts: 6
Thanks Alberto. Link was good..



Posted  11/12/2012
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