Because of the high maintenance needed to monitor and filter spammers from the RF Cafe Forums, I decided that it would
be best to just archive the pages to make all the good information posted in the past available for review. It is unfortunate
that the scumbags of the world ruin an otherwise useful venue for people wanting to exchanged useful ideas and views.
It seems that the more formal social media like Facebook pretty much dominate this kind of venue anymore anyway, so if
you would like to post something on RF Cafe's
page, please do.
Below are all of the forum threads, including all
the responses to the original posts.
Post subject: ### High Performance RF Front End, Selectivity + Overload Posted: Mon Nov 06,
2006 12:20 pm
Joined: Mon Nov 06, 2006 12:15 pm
We are working on a design for a high performance RF Front End for a digital FM Reciever. The end
system will perform many various RF processing techniques using a Xilinx FPGA device.
That being said, we
have some specific criteria to meet on the RF Front End
Such as - sensitivity down to 1-5uV range at the
frequency of interest
Overload rejection of upto 12V for a blocking signal without densensing
as McIntosh reciever (MR-78) that was designed to handle such overload without the desensing effect.
anyone have references, schematics, etc for any various RF Front ends that could offer such overload rejection
and/or references on how to develop such overload protection without the desensing effect?
The overload -
without desensing - is the primary issue we are facing right now.