Because of the high maintenance needed to monitor and filter spammers from the RF Cafe Forums, I decided that it would
be best to just archive the pages to make all the good information posted in the past available for review. It is unfortunate
that the scumbags of the world ruin an otherwise useful venue for people wanting to exchanged useful ideas and views.
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Below are all of the forum threads, including all
the responses to the original posts.
Post subject: Gain expansion
Unread postPosted: Fri Jul
15, 2005 2:04 am
In a three stage amplifier that I
have designed (pHEMTs as active devices), I am noticing an substantial
gain increase (about 3 dB) with input power. The small signal gain is
down 4 dB from the simulated value but starts to go up with input power
before the gain starts to compress. The gain 'expansion' is also so
steep it almost looks like there is a discontinuity in the Gain/Pin
curves. Return losses are close to simulated values. Any ideas on what
might be causing this?
Unread postPosted: Fri Jul 15, 2005 2:43 am
Joined: Mon Jun 27, 2005 2:02 pm
The situation you described is common
in several transistor technologies. It is mostly related to bias level
the transistor gets and can be emphasized or de-emphasized with lower
or higher bias respectively.
This gain expansion as gain compression
is considered as non-linearity.
You can make this useful, if
you plan to use some sort of of linearization scheme for your amplifier.
Unread postPosted: Mon Jul
18, 2005 12:53 pm
Mon Jun 27, 2005 2:02 pm
a clarification to my previous post: By bias level, I meant for example
the Vgs voltage level in JFET's/MESFET's