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ESD - RF Cafe Forums

The original RF Cafe Forums were shut down in late 2012 due to maintenance issues. Below are all of the old forum threads, including all the responses to the original posts.

-- Amateur Radio
-- Antennas
-- Circuits & Components
-- Systems
-- Test & Measurement

Post subject: ESD Posted: Thu Aug 31, 2006 4:44 am


Joined: Tue Apr 25, 2006 2:01 am
Posts: 7
An on-chip integrated TTL driver that we designed for a six bit phase shifter appears prone to ESD issues. After on-wafer testing or after assembly operations, certain bits in a previously working phase shifter fail to turn on. Inspection under a microscope usually reveals a burnt out device or fused transmission lines (at places where one metal layer crosses over another, the separating dielectric is 0.15 microns thick with a dielectric constant of 6.65) in the driver. As I stated earlier, we suspect ESD; we have been careful to take the necessary precautions such as wearing anti-static clothing and wrist straps when handling the chips but the problems persist. I was wondering if there might be other potential reliability issues that I was'nt aware off. I would also like to hear from you on ESD protection circuitry that we could incorporate off-chip.


Post subject: ESDPosted: Thu Aug 31, 2006 7:14 am


Joined: Fri Feb 17, 2006 12:07 pm
Posts: 218
Location: London UK
I have read over the last year in the electronic press a lot of reports of chip and circuit failures due to decreasing use of, or even elimination of, lead for soldering, and an increased use of tin.

You might encounter solution of one metal into another that eventually "corrodes" one track away.

Another problem is, with increasing presence of tin, there is a crystalline growth in metallic tin that can track across from one conductor to another. It is called "tin tree". Check it out.

The intrinsic impedance of TTL is usually considered so low that one can forget about ESD effects under normal lab or assembly shop conditions.


Post subject: Re:ESDPosted: Thu Aug 31, 2006 7:57 am


Joined: Tue Apr 25, 2006 2:01 am
Posts: 7
Thanks Nubbage for your reply. By 'TTL driver' I actually meant to say that our on-chip driver accepts a TTL input (0V/5V) and converts it to the voltage levels (-2.5V/+0.5V) needed to switch the pHEMTs in the phase shifter. The driver was designed using 0.5 micron gate length pHEMTs and schottky diodes.


Post subject: ESDPosted: Thu Aug 31, 2006 9:31 am


Joined: Fri Feb 17, 2006 12:07 pm
Posts: 218
Location: London UK
I had a lot of trouble with punch-through failure of Schottky diodes in the presence of fast ie short rise-time pulses in a radar system with PIN switches followed by Schottky diode detectors (Agilent 2800 types). We ultimately traced the problem to the presence of high current narrow pulse circulation on the ground-planes. The diodes were lasting about 30 minutes to 2 hours, then failing due to puch-through.

The product never made it through the next phase of re-design, as the division closed shortly afterwards.

The only experience I can offer is that Schottky technology is not as robust as the manufacturers would like us to believe, especially when diodes are in the presence of transient pulses, or I guess static discharge, which is a similar phenomenon.


Post subject: Posted: Sat Sep 02, 2006 12:41 am


Joined: Wed Jun 21, 2006 8:33 pm
Posts: 21
Location: Queen Creek, Arizona
Your first question is correct, can you verify that this is a true ESD issue.

My question for you is this:
When you find the metal track fusing, do you also find a burned out device?
From your comments, it appears the metal track fusing is the more common failure. But this is important as there are very few cases of ESD failure due to metal only, metal failures as a result of ESD/EOS related issues are almost always accompanied first by device burn-out/failures that then conduct so much current at such high power densities that we see metal failures.

Metal track and ILD breakdowns are almost always the strongest link in the ESD currrent path, and the last parts to fail, assuming proper diligence was designed into the ESD architecture (obviously esd currents can not be expected to flow through a 1 um wide signal bus).

Now, if you have device burnout, and it is located directly under or near your melting metal tracks, or especially if it is part of the ESD current paths, then this could likely be a result of ESD/EOS events as the secondary effects of temperature and high currents passing through or nearby your node could create this problem. But I again stress that it is very unlikely that this track is your primary ESD failure.

If you are seeing only this track shorting, unaccompanied by failed devices, the corrosion theory suggested by Nubbage would be a more likely candidate, or maybe an electromigration issue. Another issue could be antenna effects from processing and early testing, if the tracks failing are high impedance nodes with no leakage paths. (essentially an EOS failure).

I am going to end this, as further comments are even more prone to speculation at this point, but to better answer your question of wether it is ESD, more info must be shared regarding the types of failure you are seeing, and what are the relationships of failing nodes to bond pads and ESD current paths. (are the tracks part of the IO, power busses, or internal signals with no direct relationship or connectivty to bond pads, etc).

I hope this helps,

CMOS RF and Analog ESD Specialist!

Posted  11/12/2012

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