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Buffering oscillator for PLL input - RF Cafe Forums

Because of the high maintenance needed to monitor and filter spammers from the RF Cafe Forums, I decided that it would be best to just archive the pages to make all the good information posted in the past available for review. It is unfortunate that the scumbags of the world ruin an otherwise useful venue for people wanting to exchanged useful ideas and views. It seems that the more formal social media like Facebook pretty much dominate this kind of venue anymore anyway, so if you would like to post something on RF Cafe's Facebook page, please do.

Below are all of the forum threads, including all the responses to the original posts.


Charl
Post subject: Buffering oscillator for PLL input Posted: Sun Jul 23, 2006 2:21 pm

Colonel


Joined: Fri May 19, 2006 5:01 am
Posts: 25
Location: Netherlands
Hello,

I got my VCO (95-120MHz) working. It is based on the ECC85 tube and a Hartley configuration (tapped inductor). However, I want to have a PLL IC (SAA1057) control the frequency. Its feedback input has an impedance of 135 ohm.

I tried connecting this input to the tap on the inductor, through a resistor on the resonant circuit directly, I even tried an additional inductor near the main one to pick up the oscillations. But the input impedance is just too darn low. I'm afraid I'm going to have to buffer it, JUST for the PLL IC.

Any suggestions for a as-simple-as-possible buffer, or some cunning trick to get it to work without a buffer?

Much obliged,
Charl


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nubbage
Post subject: Posted: Mon Jul 24, 2006 4:58 am

General


Joined: Fri Feb 17, 2006 12:07 pm
Posts: 218
Location: London UK
Typically, a low value capacitor, eg 10pF, was used to couple to the following stage. Should the input Z of the follwing stage be a low value, coupling was taken from the cathode circuit, where the source impedance was also low.

Passive matching will always result in no isolation against the effects of load impedance variation, and the attendant effect on the oscillator stability. Buffers are used not only to do impedance matching, but also because their high reverse isolation reduces these adverse effects on the stability.

I have seen high switching speed opto-isolators used as oscillator buffers (source was Agilent, but I have no record of the type).


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Charl
Post subject: Posted: Mon Jul 24, 2006 5:41 am

Colonel


Joined: Fri May 19, 2006 5:01 am
Posts: 25
Location: Netherlands
Dear nubbage,

I tried connecting the inductor tap (which is connected to the cathode) to the PLL IC through various caps, 10-1000pF. None of them worked. I think that with low value caps, the voltage on the PLL input isn't enough (it needs 10mV). With the high value caps, the loading is too great and the oscillator cuts out or does weird stuff.

I was hoping to get away with using a cheap transistor and a few resistors and caps for the buffer. Any circuit suggestions regarding this?

Thanks for your time,
Charl


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nubbage
Post subject: Buffering oscillator for PLL inputPosted: Mon Jul 24, 2006 7:52 am

General


Joined: Fri Feb 17, 2006 12:07 pm
Posts: 218
Location: London UK
Hi Charl
One method that used to be used was to tap the coupling cap a small percentage of the way up from one end of the resonator coil. Trial and error was the only way of doing this I recall, but if you have a good RF voltmeter (hi Z input) you could measure the tap position that gives 10mV. Increase the tap point away from the common connection to the resonator capacitor until you have enough voltage, but no further because you start to load the Q of the resonator until oscillation is wobbly or stops.

For a buffer I would suggest a dual gate MOSFET 40673 or 3N128 types, that have reasonably high Zin even at VHF. A source resistor of a few ohms (non-inductive of course) will increase Zin considerably by negative feedback.
This should aid with matching to the high Z of the oscillator.

Another tip might be to find an oscillator circuit with a low Z point.
Maybe a dual triode cascode design?


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Charl
Post subject: Posted: Mon Jul 24, 2006 10:52 am

Colonel


Joined: Fri May 19, 2006 5:01 am
Posts: 25
Location: Netherlands
Hello,

Thank you very much for your comments. I think the best solution to this is to just add a FET as you described. I don't think I need to be concerned much with clipping/distortion because it is the input to the (digital) PLL anyway. Am I right about this?

Also, do you have any design examples or an online reference where I might learn more about this?

Kind regards and thanks again,
Charl


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nubbage
Post subject: Buffering oscillator for PLL inputPosted: Mon Jul 24, 2006 11:11 am

General


Joined: Fri Feb 17, 2006 12:07 pm
Posts: 218
Location: London UK
Hi Charl

I think an IGFET like the RCA 3N128 or 40673 would serve well.
I have a vague feeling there might be a problem if the gate voltage swing is too high, in that the charge surge into the gate capacitance at high frequences means the Zin appears highly reactive, meaning a high capacitance and thus rapidly decreasing impedance.
However, I am sure there are scores of dudes out there with far more experience in this area than I have.

Re sources: the best would be amateur radio articles in QST (USA), RSGB (UK) and DARC (Germany) etc.



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