Because of the high maintenance needed to monitor and filter spammers from the RF Cafe Forums, I decided that it would
be best to just archive the pages to make all the good information posted in the past available for review. It is unfortunate
that the scumbags of the world ruin an otherwise useful venue for people wanting to exchanged useful ideas and views.
It seems that the more formal social media like Facebook pretty much dominate this kind of venue anymore anyway, so if
you would like to post something on RF Cafe's
page, please do.
Below are all of the forum threads, including all
the responses to the original posts.
Post subject: Breakdown voltages affects in BJT/HBT Posted: Wed Feb 08, 2006 8:20 pm
I am a student and I need to clarify a point. This questino relates to integrated cirucit
transistor and not discrete transistors.
I am using HBT (basically BJT structure) and I was doing DC sweep.
When I had just one HBT device and I ran the sweep from IBB=10u to 80uA with VCE=0 to 2.5 it works fine.
But when I have two same devices in parallel and I did DC sweep for the same ranges I get the warning that the
base-emitter and base-collector are in reverse bias breakdown.
This seems counter intiutative (may be just
because of my lack of knowledge). I thought that now that I have two devices in parallel, the overall transistor
should be able to handle more current or at least the same amount of current as the single device and should have
the same voltage limiations as the single device because the two devices are in parallel. Why do you think the
device is breakdown? Doesn't parallel mean that the collector and base of the two devices are connected together?