Electronics World Cover,TOC,and list of posted Popular Electronics articles QST Radio & TV News Radio-Craft Radio-Electronics Short Wave Craft Wireless World About RF Cafe RF Cafe Homepage RF Cafe in Morse Code Google Search of RF Cafe website Sitemap Electronics Equations Mathematics Equations Equations physics Manufacturers & distributors Engineer Jobs Twitter LinkedIn Crosswords Engineering Humor Kirt's Cogitations Engineering Event Calendar RF Engineering Quizzes AN/MPN-14 Radar 5CCG Notable Quotes App Notes Calculators Education Magazines Software,T-Shirts,Coffee Mugs Articles - submitted by RF Cafe visitors Simulators Technical Writings RF Cafe Archives Test Notes Wireless System Designer RF Stencils for Visio Shapes for Word Search RF Cafe Sitemap Advertising Facebook RF Cafe Forums Thank you for visiting RF Cafe!

Blf177 Amplifier 100mhz Stripline - RF Cafe Forums

The original RF Cafe Forums were shut down in late 2012 due to maintenance issues. Original posts:

Amateur Radio | Antennas | Circuits & Components | Systems | Test & Measurement


bartholomeus87
Post subject: Blf177 amplifier 100mhz Stripline Posted: Sat Jan 17, 2009 12:05 pm

Captain

Joined: Sat Jan 17, 2009 11:47 am
Posts: 6
Hello people,

I have question about this amplifier i would like to build. I found it on the web in the elenos sf150 handbook. I am really stuck here because i can't figure out how to recalculate the value of the stripline in the input matching circuit. There is a partlist wich contains all values of the components on the board exept this stripline. I looked at the datasheet of the blf177 and the s-parameters are calculated with a bias current of 100ma, wich is far more than on this board. So i don't exactly know what te input impedance is in complex form. Re+-Im

I can arrange a pc with agilent Genesys software, but i dont know where to start.
Who can help me out?

Thanks, Bart


Top

IR
Post subject: Posted: Mon Jan 19, 2009 3:18 pm

Site Admin


Joined: Mon Jun 27, 2005 2:02 pm
Posts: 373
Location: Germany
Hello Bart,

I would do the following process:

1. I would use the S-paramaters of the transistor to see the input impedance.

2. Add the impedance of the voltage divider connected to the transistor's gate.

3. Simulate the impedance of the matching network made of:
L4, C10, C11 and C16.

3. The stripline should basically transform the impedance seen by the transistor+voltage divider to the impedance seen by the matching network made of the componenets in step 3. Both impedance should be very close to each other as the stripline will have a uniform impedance.

4. Once the impedance required for the stripline is known, then you are able to calculate its dimensions based on the substrate properties that you use for the board.


Top

bartholomeus87
Post subject: voltage dividerPosted: Tue Jan 20, 2009 5:08 pm

Captain

Joined: Sat Jan 17, 2009 11:47 am
Posts: 6
Thanks for the reply, but i don't understand the voltage divider part.
What is the function of this circuit, and how do i add/compensate the impedance for it?

Bart


Top

IR
Post subject: Posted: Wed Jan 21, 2009 2:06 am

Site Admin


Joined: Mon Jun 27, 2005 2:02 pm
Posts: 373
Location: Germany
Since in this circuit the Vgs is provided by Vcc and there is no separate voltage supply for Vgs, a voltage divider is required to set the right value of Vgs for the required DC operating point of the transistor.

The resistor connected between the gate to GND add their part to the total impedance that would be seen from the right side of the stripline. Then you should add them to the simulation to see what is the total impedance seen to the right of the stripline.


Top

bartholomeus87
Post subject: Posted: Mon Jan 26, 2009 3:29 pm

Captain

Joined: Sat Jan 17, 2009 11:47 am
Posts: 6
Thanks for the help, great forum with a lot of rf theory.
Just a question, how do you calculate te optimum bias voltage for a circuit like this? Or is just a given value in the datasheet?


Top

IR
Post subject: Posted: Mon Jan 26, 2009 3:40 pm

Site Admin


Joined: Mon Jun 27, 2005 2:02 pm
Posts: 373
Location: Germany
Many thanks!
I am happy that I can help!

There is no optimum bias for a circuit like this. You calculate the Vgs that will give you the Ids, based on the gm (Transconductance) curves in the data sheet. Per given (Vgs, Ids), there is a set of measured S-parameters provided by the manufacturer.

It is easy to calculate the bias for a JFET transistor because of the high gate impedance, which actually forms an ideal voltage divider in the gate, compared to a Bi-Polar transistor, for which you would need a Thevenin transformation to be able to set the base equivalent voltage and resistance.


Top

bartholomeus87
Post subject: Posted: Tue Jan 27, 2009 7:00 am

Captain

Joined: Sat Jan 17, 2009 11:47 am
Posts: 6
Ok, i think i'll understand that.
I've been playing around with Genesys the past few days, and i figured out a few things:
-I can simulate the network of l4, c10, c11 and c16 so i know what impedance is fed into the stripline. And graphs of the reflected power and power gain.
-I know how to calculate the dimensions of the stripline.
-I know where the s-parameters stand for. (s11,s21 enz.)

But i can't figure out how to extract the input impedance for the transistor from the s-parameters. Can you explain how to do this step-by step?

Thanks


Top

IR
Post subject: Posted: Tue Jan 27, 2009 3:32 pm

Site Admin


Joined: Mon Jun 27, 2005 2:02 pm
Posts: 373
Location: Germany
Extracting the internal impedance of the transistor would require a non-linear model of the transistor (Spice-based model).

For the purpose of your simulation such model is not required and also the knowledge of the transistor's impedance is not required, since I guess that in this transistor there is an internal matching between the gate pin and the die, therefore there is a transformation of impedances as part of the internal structure.


Top

bartholomeus87
Post subject: Posted: Wed Jan 28, 2009 4:13 am

Captain

Joined: Sat Jan 17, 2009 11:47 am
Posts: 6
I have downloaded a spice model of the blf177 from the nxp website. It is an s2p file. I saw that the Idq was 100ma, is that a problem?

I don't understand the last part, there's got to be some kind of match for the transistor?


Top

IR
Post subject: Re: Blf177 amplifier 100mhz StriplinePosted: Thu Jan 29, 2009 2:37 pm

Site Admin


Joined: Mon Jun 27, 2005 2:02 pm
Posts: 373
Location: Germany
Quote:
I have downloaded a spice model of the blf177 from the nxp website. It is an s2p file.


S2p file is not a Spice model but a linerar model. Spice model would include the equivalent circuit of the transistor, i.e. internal capacitances, inductances and other semiconductor physical related parameters.

NXP does not provide a Spice model for this device. If you are interested in it, you have to contact them.

Quote:
I don't understand the last part, there's got to be some kind of match for the transistor?


What I meant is that the impedance which can be derived from the S-parameters is measured at the device pin. the S-parameters are de-embedded ususally at the device pin, and this is not the impedance of the transistor's die. Usually transistors which deliver higher power levels are internally pre-matched, and therefore include an internal matching network, which then has to be included as part of the Spice model.

_________________
Best regards,

- IR


Top

bartholomeus87
Post subject: Re: Blf177 amplifier 100mhz StriplinePosted: Thu Jan 29, 2009 5:17 pm

Captain

Joined: Sat Jan 17, 2009 11:47 am
Posts: 6
Right, thats clear to me now. And what to do with the bias?


Top

IR
Post subject: Re: Blf177 amplifier 100mhz StriplinePosted: Fri Jan 30, 2009 5:05 pm

Site Admin


Joined: Mon Jun 27, 2005 2:02 pm
Posts: 373
Location: Germany
If you work with other bias conditions, you can ask the manufacturer to provide you different S-paramters for your bias point. I would refrain from working with different bias than the one recommended by the device manufacturer.

_________________
Best regards,

- IR








Posted  11/12/2012

RF Cafe Software

   Wireless System Designer - RF Cafe
Wireless System Designer

RF & EE Symbols Word
RF Stencils for Visio
Calculator Workbook
RF Workbench
Smith Chartâ„¢ for Visio
Smith Chartâ„¢ for Excel

About RF Cafe

Kirt Blattenberger - RF Cafe WebmasterCopyright
1996 - 2022
Webmaster:
Kirt Blattenberger,
 BSEE - KB3UON

RF Cafe began life in 1996 as "RF Tools" in an AOL screen name web space totaling 2 MB. Its primary purpose was to provide me with ready access to commonly needed formulas and reference material while performing my work as an RF system and circuit design engineer. The Internet was still largely an unknown entity at the time and not much was available in the form of WYSIWYG ...

All trademarks, copyrights, patents, and other rights of ownership to images and text used on the RF Cafe website are hereby acknowledged.

My Hobby Website:
 AirplanesAndRockets.com

Try Using SEARCH
to Find What You Need. 
There are 1,000s of Pages Indexed on RF Cafe !

height-line