7.5GHz (Input) Frequency Tripler - RF Cafe Forums
Post subject: 7.5GHz (input) frequency tripler Posted:
Mon Nov 19, 2007 7:17 pm
Dec 01, 2006 12:03 pm
to design a frequency tripler: input around 7.5GHz; output 22.5GHz.
That's all I know so far. It could be active or passive.
I have no experience of such circuits but have been looking
round and reading literature.
Can anyone suggest any kind
of circuit that would provide this frequency multiplication?
Post subject: Posted:
Tue Nov 20, 2007 4:23 am
Feb 17, 2006 12:07 pm
Location: London UK
In the past I have found HP/Avago Application Notes and
the MA-Com design notes very useful.
A varactor diode tripler
has four sections:
1) input matching section, since a varactor
has an impedance magnitude around 5 ohms
2) bias circuit (optional)
3) shunt idler circuit, a series resonant circuit at 15GHz ie.
2*Fin to circulate a high current at 2*F thru the diode
combined filter to select 3*F and a step-up match to the load.
The efficiency of a tripler will be about 30%
I hope that
helps a little.
Posted: Tue Nov 20, 2007 1:28 pm
Fri Dec 01, 2006 12:03 pm
Thanks for that Nubbage.
Solutions I've been looking into have included varactor
diodes. Other solutions I've found in the litarature include class
C amplifiers and SRDs (the latter I want to avoid for historical
A passive solution I've just come across is using
anti-parallel diode-pairs. This has been used here in the past so
is a much lower-risk solution. My only concern is not the conversion
loss, but the absolute output power of the 3rd harmonic and whether
it can drive the next stage on my circuit. I'll continue to work
to enhance the output power in my simulation, whether it be tuning
input/output matches or looking at different diodes. Any advice
as to which diode parameters may change/enhance the output power
of the 3rd harmonic is greatly welcome.
Post subject: Posted: Wed Nov 21,
2007 4:17 am
Joined: Fri Feb 17, 2006
Location: London UK
My experience with step recovery diodes was 35 years ago. We had
a lot of problems with instability on start-up, due to device characteristic
drift with chip temperature (although we under-ran the devices).
We could tune the matching circuit for optimum output spectrum when
drive was applied, but ten minutes later the spectrum broke up into
something resembling a hedge-hog. The manufacturers eventually came
up with elaborate solutions requiring forward bias circuits with
a critical temperature coefficient to compensate for the chip temperature
Regarding antiparallel diode pairs, I have only
read articles on these. My impression was they were mainly suited
to even harmonic multipliers. But I may be wrong here.
C or even Class D hard-driven MESFETs with a high Q resonator on
the output is a promising possible solution. By studying the input-output
characteristic curves, or using a software model, it should be possible
to estimate the harmonic content without a resonator, for example
using Fourier Analysis. Then with a known input to a resonator of
known Q it should be possible to compute the transfer efficiency
for the third harmonic. Sadly I do not have practical experience
with this approach however.